With the constant evolution of semiconductor technology, semiconductor dies are becoming increasingly smaller. More functions, however, need to be integrated into these semiconductor dies. Accordingly, these semiconductor dies have increasingly greater numbers of I/O pads packaged into smaller areas, and the density of the I/O pads is quickly rising. As a result, the packaging of semiconductor dies is becoming more challenging.
Packaging technologies can be divided into multiple categories. In one of the categories of packaging, dies are sawed from wafers before they are packaged onto other wafers, and “known-good-dies” are packaged. An advantage of this packaging technology is the possibility of forming fan-out chip packages, which means that the I/O pads on a die can be redistributed to a greater area than the die itself. Therefore, the number of I/O pads packed on the surfaces of the dies can be increased.
New packaging technologies have been developed to further improve the density and functions of semiconductor dies. These relatively new types of packaging technologies for semiconductor dies face manufacturing challenges, and they have not been entirely satisfactory in all respects.